1#ifndef STC15_INTERRUPTSH
2#define STC15_INTERRUPTSH
85#define INTERRUPT_INT0 0
92#define INTERRUPT_INT1 2
99#define INTERRUPT_INT2 10
106#define INTERRUPT_INT3 11
113#define INTERRUPT_INT4 16
121#define INTERRUPT_COUNTER0 1
128#define INTERRUPT_TIMER0 1
135#define INTERRUPT_COUNTER1 3
142#define INTERRUPT_TIMER1 3
149#define INTERRUPT_COUNTER2 12
156#define INTERRUPT_TIMER2 12
163#define INTERRUPT_COUNTER3 19
170#define INTERRUPT_TIMER3 19
177#define INTERRUPT_COUNTER4 20
184#define INTERRUPT_TIMER4 20
191#define INTERRUPT_UART1 4
198#define INTERRUPT_UART2 8
205#define INTERRUPT_UART3 17
212#define INTERRUPT_UART4 18
219#define INTERRUPT_ADC 5
226#define INTERRUPT_LVD 6
233#define INTERRUPT_PCA 7
240#define INTERRUPT_SPI 9
247#define INTERRUPT_PWM 13
254#define INTERRUPT_CMPR 21
315#define enable_mcu_interrupts() (EA = 1)
326#define disable_mcu_interrupts() (EA = 0)
335#define is_mcu_interrupts_enabled() (EA == 1)
344#define enable_low_voltage_interrupt() (ELVD = 1)
353#define disable_low_voltage_interrupt() (ELVD = 0)
363#define is_low_voltage_interrupt_enabled() (ELVD == 1 && is_mcu_interrupts_enabled())
372#define enable_adc_interrupt() (EADC = 1)
381#define disable_adc_interrupt() (EADC = 0)
391#define is_adc_interrupt_enabled() (EADC == 1 && is_mcu_interrupts_enabled())
400#define enable_uart1_interrupt() (ES = 1)
409#define disable_uart1_interrupt() (ES = 0)
419#define is_uart1_interrupt_enabled() (ES == 1 && is_mcu_interrupts_enabled())
428#define enable_int0_interrupt() (EX0 = 1)
437#define disable_int0_interrupt() (EX0 = 0)
447#define is_int0_interrupt_enabled() (EX0 == 1 && is_mcu_interrupts_enabled())
456#define enable_int1_interrupt() (EX1 = 1)
465#define disable_int1_interrupt() (EX1 = 0)
475#define is_int1_interrupt_enabled() (EX1 == 1 && is_mcu_interrupts_enabled())
484#define enable_int2_interrupt() (bit_set(INT_CLKO, SBIT4))
493#define disable_int2_interrupt() (bit_clr(INT_CLKO, CBIT4))
503#define is_int2_interrupt_enabled() (test_if_bit_set(INT_CLKO, SBIT4) && is_mcu_interrupts_enabled())
512#define enable_int3_interrupt() (bit_set(INT_CLKO, SBIT5))
521#define disable_int3_interrupt() (bit_clr(INT_CLKO, CBIT5))
531#define is_int3_interrupt_enabled() (test_if_bit_set(INT_CLKO, SBIT5) && is_mcu_interrupts_enabled())
540#define enable_int4_interrupt() (bit_set(INT_CLKO, SBIT6))
549#define disable_int4_interrupt() (bit_clr(INT_CLKO, CBIT6))
559#define is_int4_interrupt_enable() (test_if_bit_set(INT_CLKO, SBIT6) && is_mcu_interrupts_enabled())
568#define enable_timer0_interrupt() (ET0 = 1)
577#define disable_timer0_interrupt() (ET0 = 0)
587#define is_timer0_interrupt_enabled() (ET0 == 1 && is_mcu_interrupts_enabled())
596#define enable_timer2_interrupt() (bit_set(IE2, SBIT2))
605#define disable_timer2_interrupt() (bit_clr(IE2, CBIT2))
615#define is_timer2_interrupt_enabled() (test_if_bit_set(IE2, SBIT2) && is_mcu_interrupts_enabled())
624#define enable_spi_interrupt() (bit_set(IE2, SBIT1))
633#define disable_spi_interrupt() (bit_clr(IE2, CBIT1))
643#define is_spi_interrupt_enabled() (test_if_bit_set(IE2, SBIT1) && is_mcu_interrupts_enabled())
655#define enable_comparator_interrupt(trigger) \
657 if (trigger == LOW_TO_HIGH || trigger == ANY_EDGE) \
659 bit_set(CMPCR1, SBIT5); \
661 if (trigger == HIGH_TO_LOW || trigger == ANY_EDGE) \
663 bit_set(CMPCR1, SBIT4); \
674#define disable_comparator_interrupt() \
676 bit_clr(CMPCR1, CBIT5); \
677 bit_clr(CMPCR1, CBIT4); \
688#define is_comparator_interrupt_enabled() ((test_if_bit_set(CMPCR1, SBIT4) || test_if_bit_set(CMPCR1, SBIT5)) && is_mcu_interrupts_enabled())
706#define set_pca_interrupt_priority(priority) (PPCA = priority)
715#define get_pca_interrupt_priority() (PPCA)
724#define set_low_voltage_interrupt_priority(priority) (PLVD = priority)
733#define get_low_voltage_interrupt_priority() (PVLD)
742#define set_adc_interrupt_priority(priority) (PADC = priority)
751#define get_adc_interrupt_priority() (PADC)
759#define set_uart1_interrupt_priority(priority) (PS = priority)
768#define get_uart1_interrupt_priority() (PS)
776#define set_int0_interrupt_priority(priority) (PX0 = priority)
785#define get_int0_interrupt_priority() (PX0)
794#define set_int1_interrupt_priority(priority) (PX1 = priority)
803#define get_int1_interrupt_priority() (PX1)
812#define set_timer0_interrupt_priority(priority) (PT0 = priority)
821#define get_timer0_interrupt_priority() (PT0)
830#define set_spi_interrupt_priority(priority) (priority == HIGH ? bit_set(IP2, SBIT1) : bit_clr(IP2, CBIT1))
839#define get_spi_interrupt_priority() (test_if_bit_set(IP2, SBIT1))
856#define set_int0_interrupt_trigger(trigger) ( IT0 = trigger)
866#define get_int0_interrupt_trigger() (IT0)
875#define set_int1_interrupt_trigger(trigger) (IT1 = trigger)
885#define get_int1_interrupt_trigger() (IT1)
external_interrupt_trigger_t
interrupt (INT0, INT1) trigger enumeration
Definition interrupt.h:277
interrupt_priority_t
priority enumeration
Definition interrupt.h:264
comparator_interrupt_trigger_t
Comparator interrupt trigger enumeration.
Definition interrupt.h:290
@ ONLY_FALLING_EDGE
Generate interrupt only on fallign edge.
Definition interrupt.h:281
@ RAISING_OR_FALLING_EDGE
Generate interrupt on both raise and falling edges.
Definition interrupt.h:279
@ HIGH
High priority.
Definition interrupt.h:268
@ LOW
Low priority.
Definition interrupt.h:266
@ HIGH_TO_LOW
High to low edge trigger.
Definition interrupt.h:294
@ LOW_TO_HIGH
Low to high edge trigger.
Definition interrupt.h:292
@ ANY_EDGE
Any edge trigger.
Definition interrupt.h:296