STC15W408AS library 0.10.0
|
Macros | |
#define | T0 P34 |
T0 pin definition. | |
init | |
Counter initializaion functions | |
#define | counter0_mode0_init() |
Initialize mode0 for counter0. | |
run | |
Counter run/stop/reload functions | |
#define | counter0_mode0_start(value) |
Run counter0. | |
#define | counter0_mode0_stop() |
Stop counter0. | |
#define | is_counter0_mode0_started() (TR0 == 1 && (is_counter0_mode0_gate_opened() || INT0 == 1) ) |
Get counter0 mode0 started status. | |
read/write | |
Counter get and set value functions | |
#define | counter0_mode0_get_value() ((((uint16_t) TH0) << 8) | TL0) |
get counter0 value in mode0 | |
#define | counter0_mode0_set_value(value) |
set counter0 value in mode0 | |
config | |
Counter0 pin output and gate config functions | |
#define | counter0_mode0_enable_P35_output() (bit_set(INT_CLKO, SBIT0)) |
enable output to P3.5 | |
#define | counter0_mode0_disable_P35_output() (bit_clr(INT_CLKO, CBIT0)) |
disable output to P3.5 | |
#define | is_counter0_mode0_P35_output_enabled() (test_if_bit_set(INT_CLKO, SBIT0)) |
get pin P3.5 output state to P3.5 | |
#define | counter0_mode0_open_gate() (bit_clr(TMOD, CBIT3)) |
Open counter0 gate. | |
#define | counter0_mode0_close_gate() (bit_set(TMOD, SBIT3)) |
Close counter0 gate. | |
#define | is_counter0_mode0_gate_opened() (test_if_bit_cleared(TMOD, SBIT3)) |
Get gate state. | |
Functions and data structures for counter0 mode0.
This module supports general purpose counter0. Mode0 is auto reload 16-bit counter.
Counter0 increments its value on T0 pin change state from 0 to 1. Once the counter reaches its maximum value of 65535, the counter is reset to zero at the next increment. On counter overflow reset interrupt 1 is raised.
#define counter0_mode0_close_gate | ( | ) | (bit_set(TMOD, SBIT3)) |
Close counter0 gate.
Closing gate stop counter0.
#define counter0_mode0_disable_P35_output | ( | ) | (bit_clr(INT_CLKO, CBIT0)) |
disable output to P3.5
Disable pin P.3.5 state changes on counter0 overflow. By default P3.5 output is disabled
#define counter0_mode0_enable_P35_output | ( | ) | (bit_set(INT_CLKO, SBIT0)) |
enable output to P3.5
Enable pin P.3.5 state changes on counter0 overflow. By default P3.5 output is disabled
#define counter0_mode0_get_value | ( | ) | ((((uint16_t) TH0) << 8) | TL0) |
get counter0 value in mode0
#define counter0_mode0_init | ( | ) |
Initialize mode0 for counter0.
Enable counter0 interrupt and set mode0
#define counter0_mode0_open_gate | ( | ) | (bit_clr(TMOD, CBIT3)) |
Open counter0 gate.
When gate is opened counter0 will count. By default after init gate is opened. This routine explicitly open the gate.
#define counter0_mode0_set_value | ( | value | ) |
set counter0 value in mode0
Call this method before counter0 started.
value | uint16_t counter value to set |
#define counter0_mode0_start | ( | value | ) |
Run counter0.
Before run counter0_mode0_init should be called. After run counter0 is counted T0 pin state change. Interrupt handler void timer0ISR(void) __interrupt(1) should be defined in user code.
value | uint16_t initial counter value |
#define counter0_mode0_stop | ( | ) |
Stop counter0.
Stop count T0 pin state changes. Before stop counter0_start should be called.
#define is_counter0_mode0_gate_opened | ( | ) | (test_if_bit_cleared(TMOD, SBIT3)) |
Get gate state.
returns bool. True if gate is opened and false if gate is closed
#define is_counter0_mode0_P35_output_enabled | ( | ) | (test_if_bit_set(INT_CLKO, SBIT0)) |
get pin P3.5 output state to P3.5
#define is_counter0_mode0_started | ( | ) | (TR0 == 1 && (is_counter0_mode0_gate_opened() || INT0 == 1) ) |
Get counter0 mode0 started status.