Timer common

Macros
#define	get_timer0_mode()   (TMOD & 0x03)
	Get timer0 mode. More...
#define	get_timer0_clock_divider()   (test_if_bit_cleared(AUXR, SBIT7) ? T12 : T1)
	Get timer0 clock divider. More...
#define	get_timer2_mode()   (0)
	Enable output of meandr with timer interval on P3.5 pin. More...
#define	get_timer2_clock_divider()   (test_if_bit_set(AUXR, SBIT2) ? T1 : T12)

Enumerations
enum	timer_clock_divider_t { T1 = 1 , T12 = 12 }
	Timer clock divider values enum. More...

Detailed Description

Common functions and data structures for timers.

Author

Michael Golovanov

Macro Definition Documentation

get_timer0_clock_divider

#define get_timer0_clock_divider

(

)

(test_if_bit_cleared(AUXR, SBIT7) ? T12 : T1)

Get timer0 clock divider.

Returns

timer0 clock divider

get_timer0_mode

#define get_timer0_mode

(

)

(TMOD & 0x03)

Get timer0 mode.

Returns

timer0 mode in range from 0 to 3

get_timer2_clock_divider

#define get_timer2_clock_divider

(

)

(test_if_bit_set(AUXR, SBIT2) ? T1 : T12)

Get timer2 clock divider

Returns

timer2 clock divider

get_timer2_mode

#define get_timer2_mode

(

)

(0)

Enable output of meandr with timer interval on P3.5 pin.

By default output is disabled

Parameters

enable

bool if true output is enabled otherwise output is disabled Get timer2 mode

Returns

timer2 mode. Timer2 have only mode0.

Enumeration Type Documentation

timer_clock_divider_t

enum timer_clock_divider_t

Timer clock divider values enum.

Enumerator
T1	Sysclk/1.
T12	Sysclk/12.