STC15W408AS library 0.10.0
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frequency.h
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1#ifndef STC15_FREQH
2#define STC15_FREQH
3
13#include <stdint.h>
14#include <sys.h>
15#include <bits.h>
16
25#define get_master_clock_frequency() (MAIN_Fosc)
26
34#define get_master_clock_frequency_high_part() (MAIN_FoscH)
35
43#define get_master_clock_frequency_low_part() (MAIN_FoscL)
44
54#define get_frequency_divider() (1 << (CLK_DIV & 0x07))
55
65#define get_frequency_divider_scale() (CLK_DIV & 0x07)
66
79#define set_frequency_divider_scale(divider_scale) \
80do { \
81 CLK_DIV &= 0xf8; \
82 CLK_DIV |= (divider_scale & 0x07); \
83} while(0)
84
93#define enable_master_clock_output_div1() (CLK_DIV |= 0x40)
94
103#define enable_master_clock_output_div2() (CLK_DIV |= 0x80)
104
113#define enable_master_clock_output_div4() (CLK_DIV |= 0xC0)
114
124#define disable_master_clock_output() (CLK_DIV &= 0x3f)
125
140
148#define get_master_clock_output_pin() ((CLK_DIV & 0xC0) == 0 ? NONE : (CLK_DIV & 0x08) == 0 ? P5_4 : P1_6)
149
157#pragma save
158#pragma disable_warning 126
159#define set_master_clock_output_pin(pin) \
160do { \
161 if (pin == NONE) \
162 { \
163 disable_master_clock_output(); \
164 } \
165 else if (pin == P5_4) \
166 { \
167 bit_clr(CLK_DIV, CBIT3); \
168 } \
169 else if (pin == P1_6) \
170 { \
171 bit_set(CLK_DIV, SBIT3); \
172 } \
173} while(0)
174#pragma restore
175
176#endif
master_clock_output_pin_t
Master clock output pins enumeration.
Definition frequency.h:132
@ P1_6
output to pin 1.6
Definition frequency.h:138
@ P5_4
output to pin 5.4
Definition frequency.h:136
@ NONE
output disabled
Definition frequency.h:134