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STC15W408AS library 0.12.0
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Macros | |
| #define | T0 P34 |
| T0 pin definition. | |
| #define | INT0 P32 |
| INT0 pin definition. | |
init | |
Counter initializaion functions | |
| #define | counter0_mode3_init() |
| Initialize mode3 for counter0. | |
run | |
Counter run/stop/reload functions | |
| #define | counter0_mode3_start(value) |
| Run counter0. | |
| #define | counter0_mode3_stop() |
| Stop counter0. | |
| #define | is_counter0_mode3_started() (TR0 == 1 && (is_counter0_mode3_gate_opened() || INT0 == 1) ) |
| Get counter0 mode3 started status. | |
read/write | |
Counter get and set value functions | |
| #define | counter0_mode3_get_value() ((((uint16_t) TH0) << 8) | TL0) |
| get counter0 value in mode3 | |
| #define | counter0_mode3_set_value(value) |
| set counter0 value in mode3 | |
config | |
Counter0 pin output and gate config functions | |
| #define | counter0_mode3_enable_P35_output() (bit_set(INT_CLKO, SBIT0)) |
| enable output to P3.5 | |
| #define | counter0_mode3_disable_P35_output() (bit_clr(INT_CLKO, CBIT0)) |
| disable output to P3.5 | |
| #define | is_counter0_mode3_P35_output_enabled() (test_if_bit_set(INT_CLKO, SBIT0)) |
| get pin P3.5 output state to P3.5 | |
| #define | counter0_mode3_open_gate() (bit_clr(TMOD, CBIT3)) |
| Open counter0 gate. | |
| #define | counter0_mode3_close_gate() (bit_set(TMOD, SBIT3)) |
| Close counter0 gate. | |
| #define | is_counter0_mode3_gate_opened() (test_if_bit_cleared(TMOD, SBIT3)) |
| Get gate state. | |
Functions and data structures for counter0 mode3.
This module supports general purpose counter0. Mode3 is auto reload 16-bit counter. Mode3 is like mode2 but without ability to disable interrupts.
| #define counter0_mode3_close_gate | ( | ) | (bit_set(TMOD, SBIT3)) |
Close counter0 gate.
Closing gate stop counter0.
| #define counter0_mode3_disable_P35_output | ( | ) | (bit_clr(INT_CLKO, CBIT0)) |
disable output to P3.5
Disable pin P.3.5 state changes on counter0 overflow. By default P3.5 output is disabled
| #define counter0_mode3_enable_P35_output | ( | ) | (bit_set(INT_CLKO, SBIT0)) |
enable output to P3.5
Enable pin P.3.5 state changes on counter0 overflow. By default P3.5 output is disabled
| #define counter0_mode3_get_value | ( | ) | ((((uint16_t) TH0) << 8) | TL0) |
get counter0 value in mode3
| #define counter0_mode3_init | ( | ) |
Initialize mode3 for counter0.
Enable counter3 interrupt and set mode3
| #define counter0_mode3_open_gate | ( | ) | (bit_clr(TMOD, CBIT3)) |
Open counter0 gate.
When gate is opened counter0 will count. By default after init gate is opened. This routine explicitly open the gate.
| #define counter0_mode3_set_value | ( | value | ) |
set counter0 value in mode3
Call this method before counter0 started.
| value | uint16_t counter value to set |
| #define counter0_mode3_start | ( | value | ) |
Run counter0.
Before run counter0_mode3_init should be called. After run counter0 is counted T0 pin state change. Interrupt handler void timer0ISR(void) __interrupt(1) should be defined in user code.
| value | uint16_t initial counter value |
| #define counter0_mode3_stop | ( | ) |
Stop counter0.
Stop count T0 pin state changes. Before stop counter0_mode3_start should be called.
| #define is_counter0_mode3_gate_opened | ( | ) | (test_if_bit_cleared(TMOD, SBIT3)) |
Get gate state.
returns bool. True if gate is opened and false if gate is closed
| #define is_counter0_mode3_P35_output_enabled | ( | ) | (test_if_bit_set(INT_CLKO, SBIT0)) |
get pin P3.5 output state to P3.5
| #define is_counter0_mode3_started | ( | ) | (TR0 == 1 && (is_counter0_mode3_gate_opened() || INT0 == 1) ) |
Get counter0 mode3 started status.