spi.h File Reference

#include <sys.h>
#include <bits.h>
#include <gpio.h>

Include dependency graph for spi.h:

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Macros
#define	SPI_SSIG_BIT   7
	SPCTL register SSIG (SS ignore) bit position.
#define	SPI_SPEN_BIT   6
	SPCTL register SPEN (SPI enable) bit position.
#define	SPI_DORD_BIT   5
	SPCTL register DORD (data order) bit position.
#define	SPI_MSTR_BIT   4
	SPCTL register MSTR (master mode select) bit position.
#define	SPI_CPOL_BIT   3
	SPCTL register CPOL (SPI clock polarity) bit position.
#define	SPI_CPHA_BIT   2
	SPCTL register CPHA (SPI clock phase) bit position.
#define	SPI_SPR1_BIT   1
	SPCTL register SPR1 (clock rate select) bit position.
#define	SPI_SPR0_BIT   0
	SPCTL register SPR0 (clock rate select) bit position.
#define	SPI_SSIG_MSK   0x80
	SPCTL register SSIG bit mask.
#define	SPI_SPEN_MSK   0x40
	SPCTL register SPEN bit mask.
#define	SPI_DORD_MSK   0x20
	SPCTL register DORD bit mask.
#define	SPI_MSTR_MSK   0x10
	SPCTL register MSTR bit mask.
#define	SPI_CPOL_MSK   0x08
	SPCTL register CPOL bit mask.
#define	SPI_CPHA_MSK   0x04
	SPCTL register CPHA bit mask.
#define	SPI_SPR_MSK   0x03
	SPCTL register SPR (clock rate select) bits mask.
#define	SPI_SPIF_BIT   7
	SPSTAT register SPIF (transfer complete) bit position.
#define	SPI_WCOL_BIT   6
	SPSTAT register WCOL (write collision) bit position.
#define	SPI_SPIF_MSK   0x80
	SPSTAT register SPIF bit mask.
#define	SPI_WCOL_MSK   0x40
	SPSTAT register WCOL bit mask.
#define	SPI_SPSTAT_CLEAR_MSK   (SPI_SPIF_MSK | SPI_WCOL_MSK)
	SPSTAT register flags mask. Both flags are cleared by writing 1.
#define	SPI_S0_BIT   2
	P_SW1 register SPI_S0 (SPI pin group select) bit position.
#define	SPI_S0_MASK   0x04
	P_SW1 register SPI_S0 (SPI pin group select) bit mask.
#define	SPI_S1_MASK   0x08
	P_SW1 register SPI_S1 (SPI pin group select) bit mask.
#define	SPI_SW_MASK   (SPI_S0_MASK | SPI_S1_MASK)
	P_SW1 register SPI pin group select bits mask.
#define	spi_init_master_pins_SPI_PIN_GROUP_1()
	Configure the SPI pins of pin group 1 for master mode.
#define	spi_init_master_pins_SPI_PIN_GROUP_2()
	Configure the SPI pins of pin group 2 for master mode.
#define	spi_init_master_pins_SPI_PIN_GROUP_3()
	Configure the SPI pins of pin group 3 for master mode.
#define	spi_init_slave_pins_SPI_PIN_GROUP_1()
	Configure the SPI pins of pin group 1 for slave mode.
#define	spi_init_slave_pins_SPI_PIN_GROUP_2()
	Configure the SPI pins of pin group 2 for slave mode.
#define	spi_init_slave_pins_SPI_PIN_GROUP_3()
	Configure the SPI pins of pin group 3 for slave mode.
#define	spi_ss_clr_SPI_PIN_GROUP_1()   (bit_clr(P1, SBIT2))
	Pull the SS pin of pin group 1 low.
#define	spi_ss_set_SPI_PIN_GROUP_1()   (bit_set(P1, SBIT2))
	Pull the SS pin of pin group 1 high.
#define	spi_ss_clr_SPI_PIN_GROUP_2()   (bit_clr(P2, SBIT4))
	Pull the SS pin of pin group 2 low.
#define	spi_ss_set_SPI_PIN_GROUP_2()   (bit_set(P2, SBIT4))
	Pull the SS pin of pin group 2 high.
#define	spi_ss_clr_SPI_PIN_GROUP_3()   (bit_clr(P5, SBIT4))
	Pull the SS pin of pin group 3 low.
#define	spi_ss_set_SPI_PIN_GROUP_3()   (bit_set(P5, SBIT4))
	Pull the SS pin of pin group 3 high.
init
SPI initialization routines
#define	spi_init_master_pins(group)   spi_init_master_pins_##group()
	Configure the SPI pins for master mode.
#define	spi_init_slave_pins(group)   spi_init_slave_pins_##group()
	Configure the SPI pins for slave mode.
#define	spi_init_master(group, mode, clock, lsb_first)
	SPI initialization in master mode.
#define	spi_init_slave(group, mode, lsb_first)
	SPI initialization in slave mode.
#define	spi_destroy(void)
	Deinitialize the SPI module.
pin group
SPI pin mapping functions
#define	spi_set_pin_group(group)
	Set the SS/MOSI/MISO/SCLK pin group.
#define	spi_get_pin_group()   ((spi_pin_group_t)(bit_shift_right(get_reg(P_SW1, (SPI_S0_MASK | SPI_S1_MASK)), SPI_S0_BIT)))
	Get the SS/MOSI/MISO/SCLK pin group.
slave select
SPI slave select (SS) pin handling in master mode
#define	spi_ss_clr(group)   spi_ss_clr_##group()
	Select an external slave.
#define	spi_ss_set(group)   spi_ss_set_##group()
	Deselect an external slave.
sync
SPI synchronous transfer functions
#define	spi_write_sync(data)
	Write a byte over SPI.
#define	spi_transfer_sync(value, data)
	Transfer a byte over SPI.
async
SPI asynchronous transfer functions
#define	spi_async_transfer_start(data)
	Start an asynchronous SPI transfer.
#define	is_spi_async_transfer_complete()   (test_if_bit_set(SPSTAT, SPI_SPIF_MSK))
	Get the SPI asynchronous transfer status.
#define	spi_async_transfer_finish()   (bit_set(SPSTAT, SPI_SPSTAT_CLEAR_MSK))
	Clear the SPI transfer complete and write collision flags.
#define	spi_async_get_result()   (SPDAT)
	Get the byte received in the asynchronous transfer.
status
SPI state functions
#define	is_spi_enabled()   (test_if_bit_set(SPCTL, SPI_SPEN_MSK))
	Get the SPI enable status.
#define	is_spi_master()   (test_if_bit_set(SPCTL, SPI_MSTR_MSK))
	Get the SPI master/slave mode status.
#define	is_spi_write_collision()   (test_if_bit_set(SPSTAT, SPI_WCOL_MSK))
	Get the SPI write collision status.
#define	spi_get_mode()   ((spi_mode_t)get_reg(SPCTL, (SPI_CPOL_MSK | SPI_CPHA_MSK)))
	Get the SPI mode.
#define	spi_get_clock()   ((spi_clock_t)get_reg(SPCTL, SPI_SPR_MSK))
	Get the SPI clock divider.

Enumerations
enum	spi_clock_t { SPI_CLOCK_DIV_4 = 0b00000000 , SPI_CLOCK_DIV_16 = 0b00000001 , SPI_CLOCK_DIV_64 = 0b00000010 , SPI_CLOCK_DIV_128 = 0b00000011 }
	SPI clock rate. More...
enum	spi_mode_t { SPI_MODE_0 = 0b00000000 , SPI_MODE_1 = 0b00000100 , SPI_MODE_2 = 0b00001000 , SPI_MODE_3 = 0b00001100 }
	SPI mode. More...
enum	spi_pin_group_t { SPI_PIN_GROUP_1 = 0 , SPI_PIN_GROUP_2 = 1 , SPI_PIN_GROUP_3 = 2 }
	SPI pin group. More...

Macro Definition Documentation

SPI_SSIG_BIT

#define SPI_SSIG_BIT   7

SPCTL register SSIG (SS ignore) bit position.

If SSIG=1, MSTR decides whether the device is a master or a slave. If SSIG=0, the SS pin decides it. Note that if SSIG=1, CPHA must not be 0, otherwise the operation is undefined.